FPGA Research At the University of Toronto
University of Toronto has one of the most active FPGA research groups in the world. Comprising at least 5 faculty members and countless graduate students, we perform research in the following areas: … Continue reading
High-Scale Routers for Internet Infrastructure 2
« An Overview of Modern Functional Verification and Debug 2013 Measuring the Power Efficiency of Subthreshold FPGAs for Implementing Portable Biomedial Applications » Slide Link Guy Fedorkow Juniper Networks April, … Continue reading
Floorplanning
16.1 Floor planning Figure 16.3 shows that both interconnect delay and gate delay decrease as we scale down feature sizes—but at different rates. This is because interconnect capacitance tends to a limit of … Continue reading
Stick diagrams
Stick diagrams can also be used to plan out a circuit. For example, the XOR circuit in section 8. In previous sections, the stick diagram for the NAND, NOR, and … Continue reading
Standard Cell Development Tutorial
This tutorial will walk through the steps taken when creating your own customized standard cell library. Similar steps will be taken when preparing a custom block (i.e., SRAM) for inclusion … Continue reading
Kees Goossens’s Publications Page
overview network-on-chip papers theorem-proving papers technical notes Aethereal press coverage Here is a list of my publications, in reverse chronological order. Note that the copyright on some of the files … Continue reading
EE 382V-ICS, System-on-a-Chip (SoC) Design, Fall 2010
The University of Texas at Austin Department of Electrical and Computer Engineering EE 382V-ICS, System-on-a-Chip (SoC) Design, Fall 2010 (Unique number 17003) INSTRUCTOR: Jacob A. Abraham Office: ACES 6.124A, Phone: (512) … Continue reading
Structure Type in SystemVerilog
It has been there in VHDL all along, and now SystemVerilog has it too. In this article, you will learn what the new datatypes ‘structure’ and ‘union’ are and how … Continue reading
FPGALink: Easy USB to FPGA Communication
Because of its ubiquity, USB provides a good mechanism for JTAG-programming Field-Programmable Gate Arrays, but it also provides a good conduit for the host to exchange data with the FPGA, … Continue reading
Multicore Systems Laboratory
Lectures and labs illustrate how to build a multicore computer system. Topics include parallelism, instruction-set architecture, memory hierarchy, and communication primitives. Using a field-programmable gate array (FPGA) board, programmed with … Continue reading
MOS Transistors
Yannis Tsividis Learn how MOS transistors work, and how to model them. The understanding provided in this course is essential not only for device modelers, but also for designers of … Continue reading
Physics of Microfabrication: Front End Processing
Course Features Audio lectures Course Description This course is offered to graduates and focuses on understanding the fundamental principles of the “front-end” processes used in the fabrication of devices for … Continue reading
Control of Manufacturing Processes (SMA 6303)
Course Features Video lectures Demonstration – video Lecture notes Assignments and solutions Exams and solutions Course Description This course explores statistical modeling and control in manufacturing processes. Topics include the … Continue reading
Submicrometer and Nanometer Technology
Course Features Demonstration – video Course Description This course surveys techniques to fabricate and analyze submicron and nanometer structures, with applications. Optical and electron microscopy is reviewed. Additional topics that … Continue reading
E158 Spring 2007 MIPS Project
E158: Introduction to CMOS VLSI Design The Harvey Mudd College E158 class designed and built a 32-bit MIPS microprocessor in Spring 2007. This page contains all of the relevant documents … Continue reading
ARCHITECTURES FOR VIDEO PROCESSING
Integrated System Laboratory C3ISwiss Federal Institute of Technology, EPFL The first question we would like to answer is: what do we mean nowadays for video processing? In the past, more … Continue reading
E539/439 VLSI Technology & Fabrication (Fall 08)
More: http://www.southalabama.edu/engineering/ece/faculty/akhan/Courses/teaching_activities.htm How to access lectures slides? Lecture #1 The chip making process Lecture # 2 CMOS process flow Lecture # 3 Crystal structures Homework-2 Lecture # 4 Crystal growth … Continue reading
EE 491/694 (or EE 447/547) VLSI Design, Spring 2008
Associate Professor 134 CAMP Clarkson University PO Box 5720, Potsdam, NY 13699-5720 Phone: 315-268-2127 FAX: 315-268-7600 E-mail: khondker@clarkson.edu Website Educational Background B.S. Electrical Engineering, University of Engineering and Technology, … Continue reading
Transaction-Level Modeling: SystemC and/or SystemVerilog
March 6, 2006 — Today’s chip design requires extensive system-level simulations to ensure that the right architectural trade-offs are made. In most cases these simulations require that a substantial amount of … Continue reading
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