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Higher-Level Hardware Synthesis

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Higher-Level Hardware Synthesis

Richard Sharp

The exponential increase in transistor density on computer chips, supporting Moore+s law now for four decades, poses new design challenges to engineers and computer scientists alike. New techniques for managing complexity must be developed if circuits are to take full advantage of the vast numbers of transistors available.This book investigates both the design of high-level languages for hardware description and techniques involved in translating these high-level languages to silicon. The author introduces the first-order functional language SAFL, designed specifically for behavioral hardware description, and describes the implementation of its associated silicon compiler. Finally, the SAFL language is extended with pi-calculus style channels and channel passing and primitives for structural-level circuit description. The semantics of these languages is formalized and results are presented arising from the generation of real hardware exploiting these techniques.This monograph is based on the author+s PhD work conducted at the Computer Laboratory of the University of Cambridge, UK under the supervision of Dr Alan Mycroft.
Year:2004
Edition:1
Language:English
Pages:216
Download (pdf, 8.46 MB) Mirrors: [1] [2]
Source:
http://bookos.org/book/495219/8ced43
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This entry was posted on June 15, 2013 by in Ebook & Journal, Electronic & Computer Engineering, Science & Technology.
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